Silicon and Heterogeneously Integrated Photonics Towards Sub-pJ/bit, Multi-Tbps Optical I/O and Next-Generation AI Clusters

Silicon and Heterogeneously Integrated Photonics Towards Sub-pJ/bit, Multi-Tbps Optical I/O and Next-Generation AI Clusters

Description: 

As AI/ML compute clusters scale toward hundreds of thousands of accelerators, inter-chip communication bandwidth is experiencing unprecedented exponential growth, pushing traditional copper-based electrical interconnects and conventional digital signal processing (DSP)-heavy optical transceivers to their physical limits in energy consumption, thermal dissipation, and edge density. To break through the looming "power wall" and "bandwidth density bottleneck," the optical communications industry is accelerating its paradigm shift from linear-drive pluggable optics (LPO) toward co-packaged optics (CPO) and near-chip, die-level Optical I/O. This workshop focuses on revolutionary architectural and device-level breakthroughs across material platforms, native on-chip sources, high-speed modulation, and zero-power static tuning, aiming to achieve multi-Tbps per waveguide physical-layer optical interconnects under a strict sub-1 pJ/bit energy budget. The technical scope mainly encompasses: high-yield integration of quantum-dot lasers and microcombs on standard silicon photonics foundries to eliminate external laser coupling losses; sub-volt, ultra-high-bandwidth thin-film lithium niobate (TFLN) modulators based on rings and photonic crystal nanobeam cavities to enable DSP-less host ASIC/SerDes direct drive; and monolithic back-end-of-line non-volatile phase-change material (PCM) integration for post-fabrication phase correction and static power elimination. By cascading active high-efficiency devices with passive multi-dimensional multiplexing, this symposium will bridge pioneering micro-and-nanophotonics physics with commercial foundry mass-producibility, mapping out the definitive energy-efficient, high-throughput all-optical networking infrastructure.

Time: November 1, 2026 | 13:30-17:45

Venue: Conference Room 102A, 1F

Organizers:

Jiawei Wang, Harbin Institute of Technology

Yu Li, Shanghai Jiao Tong University

Zhanshi Yao, Huawei Technologies Co., Ltd.

Kaiyi Wu, Harbin Institute of Technology

Agenda:

Presider: Jiawei Wang, Harbin Institute of Technology (Shenzhen)

13:30-14:00 Jianfeng Wang, Huawei Technologies Co., Ltd

Title: Requirements for Heterogeneous Integration in Optical Communications in the AI Era

14:00-14:30 Kelaiti Xiao, Shanghai Institute of Microsystem and Information Technology Chinese Academy of Sciences

Title: Advanced packaging technologies used in Co-packaged Optic

14:30-15:00 Zekun Niu, Shanghai Jiao Tong University 

Title: Agentic PIC Design and Simulation Acceleration

15:00-15:30 Shiyang Zhu, Shenzhen Polytechnic University

Title: Hybrid Integration of Standard Silicon Photonics Process and Various Backend Process

15:30-15:45 Coffee Break

Presider: Yu Li, Shanghai Jiao Tong University

15:45-16:15 Yu Zhang, Huazhong University of Science and Technology

Title: Towards Sub-pJ/bit Optical I/O using Advanced Packaging and Heterogeneous Integrated Photonic Devices

16:15-16:45 Shikui Shen, China Unicom Research Institute

Title: Recent advances in Optical Frequency Combs and applications in optical communications

16:45-17:15 Junyin Zhang, École Polytechnique Fédérale de Lausanne

Title: Recent Advances in Thin-Film Lithium Tantalate Integrated Photonics

17:15-17:45 Xiaomeng Zhao, Shanghai Novel Si Integration Technology Co., Ltd

Title: Fabrication and Integration Technologies for Monocrystal Thin-Film Lithium Niobate